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Development of Delta Sigma (ΔΣ) ADC IP
Development of 24-bit ΔΣ ADC IP that achieves high resolution, low power consumption, and compact size.
SANEI HYTECHS is developing ΔΣ ADC (DSADC) IP that achieves low power consumption and compact size for high-precision sensors. DSADC IP features 24-bit high resolution and a conversion speed of 48Ksps (3.072MHz sampling, 64 oversampling). This ADC targets low-frequency band signals from DC to the voice band. As an ADC circuit with a VREF buffer, we aims for low power consumption and compact size.
Features of DSADC IP
Ideal for high-precision conversion in low frequency bands
Compared to pipeline ADCs and SARADCs, this ADC is suitable for converting low frequency band signals with high precision.
High linearity and excellent noise characteristics
Excellent linearity and noise characteristics enable high-precision conversion.
Flexible characteristic adjustment
By changing the characteristics of the digital filter, you can flexibly adjust the conversion speed, bandwidth, resolution, etc.
High precision with low oversampling
64 times oversampling is used as standard, enabling high-precision conversion even with low oversampling.
Discrete type configuration
The discrete ΔΣADC configuration makes the input a capacitive load.
Development and Developing ADC product
Characteristics table of our ADC IP
| PLADC | CYADC | SARADC | OS-SARADC | DSADC | |
|---|---|---|---|---|---|
| Development year | 2021 | 2021 | 2023 | 2023 | 2024 |
| Process（nm） | TSMC 180 | TSMC 180 | TSMC 180 | TSMC 180 | TSMC 180 |
| Power supply voltage（V） | 3.3 | 3.3 | 1.8 | 1.8 | 1.8 |
| Resolution（bit） | 16 | 16 | 12 | 16 | 24 |
| Conversion speed（sps） | 50M | 8.5M | 10M | 100K | 48K |
| SNR（dBFS） | 80 | 81 | 69 | 79.5 | 100 |
| VREF buffer Built-in or not | Built-in | Built-in | Built-in | Built-in | Built-in |
| Status | Evaluated | Evaluated | Evaluated | Evaluated | Under Development |
Block diagram of DSADC IP
3rd order 4bit Delta Sigma
Development status of DSADC IP
We are currently proceeding with the circuit design to meet the "Characteristics table of our ADC IP". We plan to prototype the DSADC IP in the near future.
If you are interested in the development status and detailed specifications of the DSADC IP, please feel free to contact us.
If you are interested in the development status and detailed specifications of the DSADC IP, please feel free to contact us.