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Pipeline ADC / Cyclic ADC IP development
High-speed, high-resolution ADC IP development
SANEI HYTECHS develops high-speed and high-resolution ADC IP for industrial equipment, medical equipment, video and communications.
- Pipeline ADC: 16-bit resolution, achieving a high conversion speed of 50MHz.
- Cyclic ADC: 16-bit resolution, 8.5MHz conversion speed. Features a low-power design that reduces power consumption.
Characteristics table of pipeline ADC and cyclic ADC
The characteristics of the pipeline ADC and cyclic ADC IP developed by our company are as follows.
| PLADC | CYADC | |
|---|---|---|
| Development year | 2021 | 2021 |
| Process (nm) | TSMC 180 | TSMC 180 |
| Power supply voltage (V) | 3.3 | 3.3 |
| Resolution (bit) | 16 | 16 |
| Conversion speed (sps) | 50M | 8.5M |
| SNR（dBFS） | 80 | 81 |
| VREF buffer Built-in or not | Built-in | Built-in |
| Status | Evaluated | Evaluated |
Other in-house developed ADC IP characteristics
We have developed highly original ADC technology and provide it to our customers, taking advantage of our many years of research and development and extensive experience.Detailed characteristics of other in-house developed ADC IPs can be viewed at the link below.
Features of pipeline ADC IP and cyclic ADC IP
The pipeline ADC IP and cyclic ADC IP developed by our company combine high performance and efficiency to support a wide range of applications.
The main features are as follows.
The main features are as follows.
High power efficiency
We have adopted a design that minimizes the power consumption of the entire circuit, including the VREF buffer. Our unique circuit technology has achieved high power efficiency.
VREF buffer built-in
There is no need to prepare a separate VREF circuit that requires driving capacity externally, which contributes to simplifying the system and improving design efficiency.
Digital correction function
High-precision correction is possible by running a correction program before shipment or at startup without using a multiplier circuit for gain correction.
Multi-channel support
We have adopted a design that allows multiple channels to be easily installed, supporting a wide range of applications.
Low delay pipeline
We minimize the delay time until the conversion process is completed, enabling high-speed and efficient data conversion.
Evaluation results of pipeline ADC IP and cyclic ADC IP
We use in-house developed circuit boards to evaluate pipeline ADC IP and cyclic ADC IP. The following evaluation results are representative values. We also have evaluation data for different conditions, so please feel free to contact us for more details.
DC Characteristics (INL/DNL) Measurement Results
Here are the measurement results for DC characteristics (INL/DNL).
Pipeline ADC
DNL - Output Code
INL - Output Code
Cyclic ADC
DNL - Output Code
INL - Output Code
AC Characteristics (SNR/SFDR) Measurement Results
Here are the measurement results for AC characteristics (SNR/SFDR).
Pipeline ADC
FFT(PLADC)
Cyclic ADC
FFT(CYADC)
[Measurement Conditions] Digital Correction: Enabled, Power Supply Voltage: 3.3V, Temperature: 25°C
Evaluation Results were generally in line with the target specifications. We will analyze the differences between the design values and the evaluation results and incorporate the findings into the next design iteration.
Provision of in-house developed ADC IP and process porting
Our pipeline ADC and cyclic ADC IP can be provided for various applications. We also provide custom design services based on the process and specifications according to your needs. If you are looking for an ADC IP solution, please feel free to contact us.
Provision and support of evaluation environment
At our company, we not only design semiconductor circuits, but also integrate IC prototyping, development of evaluation environments, and evaluation. The following issues are particularly important for analog circuits.
Due to factors such as those mentioned above, it is said to be difficult to achieve device performance as designed. We pursue advanced evaluation technology to eliminate these external factors as much as possible and accurately measure high-precision circuit characteristics. For more information on evaluation boards and systems, please see the link below.
- The effects of semiconductor element mismatch
- Changes in power supply and temperature
- The effects of power supply and circuit board noise
- The effects of parasitic resistance and parasitic capacitance
Due to factors such as those mentioned above, it is said to be difficult to achieve device performance as designed. We pursue advanced evaluation technology to eliminate these external factors as much as possible and accurately measure high-precision circuit characteristics. For more information on evaluation boards and systems, please see the link below.
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Collaborative Design of Digital and Software (Zynq/Intel SoC)
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Development of high-performance ADCs
- Achievements / Case | LSI Circuit Design | ADC
- Pipeline ADC / Cyclic ADC IP development
- SARADC / OS-SARADC IP development
- Delta Sigma (ΔΣ) ADC IP development
- 【Coming Soon】Development of high-performance ADC IP peripheral circuits (PGA, BGR, RCOSC)
- In-house Developed Analog IP Service
- Development of circuit boards and systems for ADC evaluation